FunCPU - Registers

The register file module has been completed as it is shown in the picture below. Please refer to architecture concept for an overview of registers and overall architecture.

It comprises the following registers:

• RI (redex index) is implemented as a 74HC273 and used to store temporary the destination index value during function reduction. If a function cannot (yet) be called (because some of its arguments are not yet available. i.e. they are not constants), then reduction reverts to the target position defined by this index.
• DI (destination index) is composed of two four bit registers using two 74HC161 chips. This holds the value of the destination register. This value can be stored temporary to and restored from RI.
• SI (source index) is implemented in similar fashion, it stores the source index, it is selected to read the current symbol of source expression.
• FI (function index) is also implemented similarly with two counters, it stores the function index, which is used to read/map the function definitions.
• AC (argument counter) is implemented with a single 74HC161 chip. This acts as the argument counter to facilitate argument interpretation and handling. Note: this counter is slightly differently used as originally proposed to save parts and reduce complexity. This is also an up-counter, with the twist, that the binary value 1111 represents the "zero" value. Applying this encoding, the zero value can be detected by looking at the TC flag output.
• V (value register) is implemented as a 74HC273. This register is used analogously to the accumulator of a traditional CPU (mainly accumulator machines). Calculated values are fetched to and from here between the memory and ALU.
• S (state register) employs a 74HC175 to store processor state. This is a four bit value, 0000 represents initial state, whereas 1111 is the final state, when computation is finished and result is available. This register is refreshed, whenever a state transition is required, as governed by the micro-code.
• SCZ - serves two purposes. The lower 3 bits are used to store the symbol classification value, the most significant bit is a flag, which tells whether argument count reached "logical" (recall the strange encoding) zero value. This register is usually refreshed upon restarting the micro-code sequence.

Please note that no register is fully or partially exposed to the programmer. The programming model does not make use of any registers directly. In fact, none of the registers can be manipulated or even accessed explicitly by the user program. All of these registers are, however, manipulated by the micro-sequencer, but it is hidden from the programmer.

Further observations:

• No conventional PC (program counter) is employed.
• No stack is present.
• No nonventional processor state register or even flags (to denote zero, carry, overflow and so on) can be found here.

A small portion of the register module is dedicated to a 4 input multiplexer, which is introduced to select among four different address values. These are as follows:

• SI - address determined by the source index. Generally used to fetch the next symbol of the expression being reduced.
• DI - address determined by the destination index. This is selected, if the part of the reduced expression must be stored to the resulting expression.
• FI - address as defined by the function index. This input is chosen when function definition is being unfolded.
• Finally, SI + V', which is used when binding argument values in the course of unfolding function definition. Note: in such case SI register points to the next symbol in source expression. Assuming that the function has three arguments: SI-1, SI-2 and SI-3 represent argument 3, 2 and argument 1 respectively. Recall that argument numbers are encoded in two's complement form, therefore by simply adding SI and V' (modified V value holding the argument number in the binary form 1111 11xy) gives us the parameter value to be bounded to the argument in question. 

 

Register board being one of the main boards implements quite a fiew buses.

Bus 10 is utilized to drive data and tag classification signals from the RAM board.

nc	nc	D6	D4	D2	D0	C2	PWR
GND	nc	D7	D5	D3	D1	C1	C0

Bus 11 transfers control signals defined by the micro-sequencer.

V_SET	AC_INC	CPO_ED	SCZ_SET	FI_SET_	FI_INC	DI_SET	RI_SET
CLK2	V_CLR	AC_SET_	CLK1	S_SET	SI_INC	CLK_RUN	DI_INC

Bus 12 transfer further signals from the micro-sequencer.

ALU_A	ALU_B	nc	nc	nc	ADR_SEL_1	ADR_SEL_0	nc
nc	nc	nc	nc	S0	S1	S2	S3

Bus 13 supplies a 8 bit address signal to the RAM module.

A7	A6	A5	A4	A3	A2	A1	A0
nc	nc	nc	nc	nc	nc	nc	nc

Bus 14 provides the current CPU state, symbol class along with argument counter zero flag (as defined by the S and SCZ registers respectively).

S3	S2	S1	S0	SCZ	SC2	SC1	SC0
nc	nc	nc	nc	nc	nc	nc	nc

Bus 15 supplies two ALU input sources, the SI and the V register.

V7	V6	V5	V4	V3	V2	V1	V0
SI7	SI6	SI5	SI4	SI3	SI2	SI1	SI0

Bus 16 receives the 8 bit ALU result, which is fed to the address multiplexer.

R7	R6	R5	R4	R3	R2	R1	R0
nc	nc	nc	nc	nc	nc	nc	nc

Finally, bus 17 is used to pass some control signals together with argument counter and power supply lines to ALU.

ALU_A	ALU_B	ac3	ac2	ac1	ac0	C	PWR
GND	nc	nc	nc	nc	nc	nc	nc

FunCPU - Arithmetic Logic Unit

The ALU module is very simple and straightforward. It is mounted together with the control board encoding logic on a single board. It performs a simple addition operation on the two operands as described in the following table. The two selector bits define the two input sources.

ALU selector	Input A	Input B	Carry	Result	Usage
00	0000 0000 (0)	V	0	V	Identity / copy
01	AC	V’	0	AC+V’	Argument counting Only four bit value is used
10	1111 1110 (-2)	V	0	V-2	Used to set AC to 1 argument, provided that V is zero beforehand
11	SI	V’	0	SI+V’	Argument binding
00	0000 0000 (0)	V	1	V+1	Increment
01	AC	V’	1	*AC+V’+1
10	1111 1110 (-2)	V	1	V-1	Decrement
11	SI	V’	1	*SI+V’+1

*these combinations are actually not used.
where V’ denotes 1111 11 V(1) V(0), where V(1) and V(0) are the two least significant bits of V.

Notice that the ALU is able to generate V (identity), V-1 (decrement), V+1 (increment) and V-2 based on the V value.

Please also observe that since this is a 7-bit CPU, it is not desirable to go out of the seven bit range. In other words, (without the tag interpretation) when V is holding a constant it cannot go beyond the range of 0..127 no matter if it is incremented or decremented. Therefore when storing the modified V value (here we mean solely V-1, V+1, but not V’) to the expression cell as defined by the destination register, the original most significant bit of the V register is fed back along with the possibly modified 7 bit part of the ALU result. This way the highest bit is always reserved and the actual constant part of the result value must lie in the 7 bit range.

Partially, in line with the aforementioned, the content of V register is not directly connected to the databus, instead, the ALU output (except for the MSB, which is coming from the V register) is released to the databus.

Input sources are mapped by six multiplexers. Four 74HC153s are utilized to select among four sources (SI, AC, 0, -2), and two 74HC157s are used to select between V and V'. The outputs of these multiplexers are fed to two 4008s to perform the 8 bit addition. 

Bus 15 connects register and ALU modules transferring the following signals to the ALU:

V7	V6	V5	V4	V3	V2	V1	V0
SI7	SI6	SI5	SI4	SI3	SI2	SI1	SI1

Bus 16 supplies the full 8 bit ALU result to the register module. This value is used in the course of argument binding.

R7	R6	R5	R4	R3	R2	R1	R0

Bus 9 has similar content, with a different arragnement. It transfers signal from the ALU to the RAM module. 

		R6	R4	R2	R0
		V7	R5	R3	R1

Bus 17 provides the signals to the ALU coming from the register modules as depicted in the table below.

ALU_A	ALU_B	AC3	AC2	AC1	AC0	C	PWR
GND

 Other buses are dedicated to signals related to keyboard processing. These are as follows:

Bus 8 is feeding RAM module with the encoded 8 bit data as defined by the user interface on the control board.

		D6	D4	D2	D0		PWR
GND		D7	D5	D3	D1

Bus 2 is a two way bus, accepting values from the control board (D0..D7) and also telling the control board what datalines can be active in a particular setup (i.e. when hotkeys are pressed) (DE0, DE1, DE6, DE7).

	DE6	D6	D4	D2	D0	DE0	PWR
GND	DE7	D7	D5	D3	D1	DE1

Finally, bus 3 accepts hot key signals from control board. Based on this information along with the 8 bit data determined by the 8 toggle switches (coming via the bus 2), the actual 8 bit data is generated, and then  transferred in bus 8 to the RAM.

	ZERO	EOX	ARG	INC	IF	DEC	PWR
GND

FunCPU - Test Module

Below a simple tester module is depicted. It is designed to facilitate the testing of other modules. 

It has one incoming databus of 16 bit width. Each of the lower eight Leds of the two ten segment Led bars corresponds to one bit in the databus. The upper two Leds of the led display on the left hand side, are as follows:
- The uppermost Led should be on, whenever the most significant bit of the left outcoming databus is connected to the ground.
- The Led below is on to denote that the least significant bit of the same outcoming databus is connected to the power supply.

The two uppermost bits of the Led bar on the right hand side indicates whether we are in clock phase 1 or 2.

The content of the outcoming databus on the left hand side can be manipulated with the two red DIP switches. This bus may also be used to provide power supply to other modules linked to the tester. In such case, the switches designated with the plus and minus signs should be set to their respective position. Recall, this can be checked by looking at the status Leds of the left hand side Led bar.

The data on the other bus on the right hand side can also be given with the 2 Dip switches (one blue and one red). There are however, two special bits on this bus. Bit 10 and 16 represents Clock 1 and Clock 2 respectively. All the other bits can be used and set arbitrary.

The red button next to the 74Hc14 Schmitt trigger is used to move from clock phase 1 (i.e. Clock 1) to clock phase 2 (i.e. Clock 2).

I hope that with this very simple module I will be able to test - among others - the register module, which is planned to be implemented next.

FunCPU - Entering Expressions

FunCPU - Clock Generator

Construction of FunCPU has begun with the clock generator. The module is already fully functional on its own, but space is left for incorporating more components for the EPROM chips storing the micro-program and for some control logic.

An 555 is used to generate the base for the clock signals. There are two options to manipulate the clock frequency. A trimmer potentiometer is used to fine tune the frequency within two ranges selected by the right switch. In one position the base clock frequency ranges roughly from 1.4 Hz to 64 Hz, which can be used for debugging, in the other position this covers the interval from 14.5 Khz to 47 Khz, which is suitable for normal operations.

A 74HC74 is used to ensure the following:
whenever the two-phase clock starts:- it starts with phase 1
- it starts with full cycle
- signals when two-phase clock starts
furthermore the duty cycle is guaranteed to be roughly 50%.

A 74HC161 fed by the two-phase clock is applied to generate micro-sequence (from 0 to 3).
A 74HC02 is used as an RS flip-flop to debounce the Edit/Run toggle switch.and also to enable/disable clock signals.

The LED-bar is used for debugging and can be turned on/off by the left switch.

not used
not used
US0	least significant bit of the micro-sequencer
US1	most significant bit of the micro-sequencer
CLK2	phase 2 of the master clock
CLK1	phase 1 of the master clock
RUN	bright, if in Run mode
EDIT	bright, if in Edit mode
CLK RUN	to indicate whether clock is enabled
CLK	Master clock with half of the frequency of the base clock

 The following BUS  ("B6") is impelemted on the board:

RUN_OUT (15)	EDIT_OUT	CLK2	not used	CLK1	not used	CLK_RUN (3)	VCC (1)
GND (16)	US0	US1	not used	not used	RUN_IN	EDIT_IN (4)	not used (2)

RUN_IN and EDIT_IN are the incoming signals (with prell) representing Run or Edit respectively. Whereas RUN_OUT and EDIT_OUT are the debounced signals. The rest of the signals are described above along with LED indicators.

Finally, we can see the clock generator in action. Before the clicking noise, FunCPU is in "Edit" mode, therefore clock is basically idling. When Run/Edit toggle is switched to "Run" position, then at the next clock cycle the clock generator starts to operate as indicated by the the blinking LEDs.

FunCPU - Control Panel

Ok, here is a photo of the real control panel. It is a little bit different from the original design. It does not look that  spectacular, but has decent functionality. 

The upper section includes 8 LEDs and 8 toggle switches. These are used for data entry as indicated by the label in between. In addition to showing the full 8-bit value in the memory, this value is decoded and its type (remember, we are dealing with a tagged architecture) is indicated below by the type indicator LEDs. 

If the data is an argument, then the blue “arg” LED will be active, if a constant is found, then the “cons” LED is bright and so on. So by looking at these LEDs one immediately will know the function of the data being observed. 

Also six function shortcut buttons are introduced to facilitate the data-entry. One may have a choice of selecting the data with the 8 toggle switches or using one of the function buttons, or alternatively having a combination of them.

“0” is used to store zero value (also interpreted as True). This comes handy, since one does not have to bother about turning the toggle switches to zero position to be able to enter 0. “eox” (indicating end of expression) does the opposite, it gives a $FF value. “arg” button can be used along with the two least significant toggle switches to enter argument number. The use of “inc”, “dec” and “if” should be self-explanatory.

I expect that the majority of functions and expressions can be simply entered using the functional buttons, and toggle switches will be rarely used.  On one hand this would speed up data-entry significantly, on the other hand function indicator LEDs will be major help in debugging.

Once the actual data is selected, the “Store” button must be pressed to store the data into the memory.

To where and from where this 8-bit is actually coming, is determined by the address control gizmos. The toggle switch “Exp/Func” switches between expression and function memory. Whereas the two silver knobs enables us to select a full 8-bit value (four bit each).

All the above buttons, switches, knobs work only in “Edit” mode, but do not have any effect in “Run” mode. To choose between the two modes, one has to toggle the “Edit/Run” switch.

Please note that the LEDs are working in the same fashion regardless of the operating mode, except, that in running mode the address is determined by the processor internal state, therefore the data being shown (both by the data and address LEDs) reflects the actual computational state. The actual 4-bit state is indeed displayed by the state LEDS.
0000 is the initial, starting state. 1111 is the final state for successful computation.

Finally, the big red button on the right bottom is used to turn the computer on or off.

FunCPU - Boxing Day...

It is high time I had gone to look for a suitable box to be the case of the FunCPU. I have decided on the one below. It is quite ugly and girlish actually, but it was the cheapest option.

At least this will be the choice for CPU-case of my first attempt to build the CPU. 

I expect to implement all functionality using 5 or 6 modules. Each module will be implemented as a single board. These boards should fit into this box.